Gameboy LCD Controller


Gameboy Programming Manual


Screen Timing

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LCDC Control Register

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LCDC control register.

Configures how object data is read and where it is read from.

STAT Register

LCD controller status and interrupt configuration.

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Indicates current status of LCD controller module in the CPU.

LCD controller interrupts

Bit Name
6 LYC = LY Interrupt
5 Mode 2 OAM Interrupt
4 Mode 1 V-Blank Interrupt
3 Mode 0 H-Blank Interrupt

Mode 0

Mode 1

Mode 2:

Mode 3:

LCDC Mode Timing Diagram

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Mode 0 is present between 201-207 clks, 2 about 77-83 clks, and 3 about 169-175 clks. A complete cycle through these states takes 456 clks. VBlank lasts 4560 clks. A complete screen refresh occurs every 70224 clks.)

LCDC Y-Coordinate Registers

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LY indicate which line of data is being transferred to the LCD display driver.

When the LCDC goes from ON to OFF, LY is reset to 0.

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LYC is used to compare a value to the LY register. If they match the match flag is set in the STAT register.

This can be used to invoke an interrupt when LY reaches a particular scan line.

Blanking Periods

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LCD driver scans across each line segment to display memory on the screen. The H-Blank period is the time it takes to re-position to the start of the next scan line. The V-Blank period is the time it takes the LCD driver to re-position to the first line.